1. Field
The present invention relates to a core substrate, more particularly to a core substrate and multilayer printed circuit board using paste bumps.
2. Description of the Related Art
The conventional multilayer printed circuit board is manufactured by forming inner layer circuits on the surfaces of a core substrate, such as a copper clad laminate (CCL), etc., through the application of an additive process or a subtractive process, etc., and by forming outer layer circuits through the stacking of insulation layers and metal layers in order, by the same method as for the inner layer circuits.
That is, the method of manufacturing a multilayer printed circuit board according to prior art includes first perforating IVH's in a core substrate (e.g. a CCL, etc.) by mechanical drilling, etc., forming plating layers (e.g. by PNL plating, etc.) on the surfaces of the core substrate and on the inner perimeters of the IVH's, filling the inside spaces of the IVH's and polishing the surfaces, and then forming inner layer circuits on the surfaces of the core substrate by applying a subtractive process, etc.
Next, an insulation element is stacked and metal layers are formed on the surface, or an insulation element is stacked that already has a metal layer on its surface, such as RCC (resin coated copper), etc., onto the surfaces of the core substrate, after which BVH's are processed by laser drilling, etc., for electrical interconnection between the metal layers and inner layer circuits, PTH's which penetrate the entire cross section of the printed circuit board are perforated by mechanical drilling, etc., and outer layer circuit layers are formed on the surfaces of the insulation element by the same method as for the inner layer circuits.
However, the conventional method requires a plating process, which is complicated, expensive, and time-consuming. In order to simplify the complicated process of prior art and to manufacture a multilayer printed circuit board quickly and inexpensively by a collective stacking procedure, the so-called “B2IT (buried bump interconnection technology)” has been commercialized, which allows a simple and convenient stacking process by printing paste on a copper foil 3 to form bumps 2′ and stacking an insulation element 1 thereon to prefabricate a paste bump board 4, as illustrated in FIG. 1.
Prior art related to the paste bump board includes an invention which uses a paste bump board having bumps made of conductive paste formed on a copper foil to allow simple and easy interconnection between the terminals of high-density electronic components.
To thus manufacture a core substrate having copper foil layers on both surfaces using conventional paste bump boards, an insulation element is stacked onto a paste bump board so that the paste bumps penetrate the insulation element, and a copper foil is stacked thereon, so that the copper foil layers of both surfaces may be electrically interconnected by the paste bumps.
However, in this method of manufacturing a double-sided substrate, there is a limit on the allowable height of the substrate according to the diameter of the paste bumps, which consequently becomes a limit on the thickness of the insulation element interposed within the double-sided substrate. A few examples of the maximum thicknesses that allow penetration of the insulation element according to the diameters of the paste bumps are listed below in the following table.
Maximum Thickness of InsulationDiameter of Paste BumpsElement (in the case of PPG)150 μm60 μm or lower130 μm40 μm or lower 80 μm30 μm or lower
As seen in the examples of the preceding table, since the allowable height is limited by the diameter of the paste bumps, the paste bumps must be formed with a diameter greater than a certain value in order to manufacture a core substrate having a particular thickness. This causes difficulties in adjusting the thickness of the double-sided substrate and causes problems in forming high-density wiring patterns on the copper foil layers.